2Gbit NAND Flash Chip TSOPI-48 2.7V-3.6V 25ns Write Cycle IMS2G083ZZC1S-WP

• Single level cell technology
• OPEN NAND FLASH INTERFACE(ONFI) 1.0 COMPLIANT
• POWER SUPPLY VOLTAGE- VCC = 2.7V ~ 3.6V
• MEMORY CELL ARRAY (with SPARE)
  • Page size :x8 – 3.3V : (2K+128spare) bytes
  • Block size :x8 – 3.3V : (128K+8Kspare) bytes
  • Device size : 2048blocks
• PAGE READ / PROGRAM TIME
  • Random Read Time(tR) : 30us(Max)
  • Sequential access time :3.3v - 25ns(Min)
  • Page program : 300us(Typ)
• BLOCK ERASE
  • Block Erase Time : 3.5ms(Typ)
• COMMAND SET
  • ONFI1.0 Compliant command set
  • Read Unique ID
• SECURITY
  • OTP area
  • Serial number(unique ID)
  • Non-volatile protection
• ELECTRONIC SIGNATURE
  • 1st cycle: Manufacturer Code
  • 2nd cycle: Device Code
  • 3rd cycle: Internal chip number, Cell Type, Number of Simultaneously Programmed Pages, interleaved Program, Write Cache
  • 4th cycle: Page size, Block size, Organization, Spare size, Serial access time
  • 5th cycle : ECC, Multi-plane information
• RELIABILITY
  • 50,000 Program / Erase cycles(with 4 bit ECC per 512 Byte )
• DATA RETENTION
  • 10years
• Operating TEMPERATURE
  • Commercial (0℃ ~ 70℃)
• CHIP ENABLE DON’T CARE OPTION
  • Simple interface with microcontrollers
• PACKAGE OPTION
  • Pb-Free Package
  • 48-pin TSOP(12 x 20 / 0.5 mm pitch)

The NAND FLASH is offered with a 3.3-V VCC power supply, and with x8 I/O interface. Its NAND cell provides the most cost-effective solution for the solid state mass storage market. The memory is divided into blocks that can be erased independently so it is possible to preserve valid data while old data is erased. The page size for x8 is (2048 +spare) bytes.

To extend the lifetime of NAND flash devices, the implementation of an ECC is mandatory. The chip supports CE# don't care function. This function allows the direct download of the code from the NAND flash memory device by a microcontroller, since the CE# transitions do not stop the read operation. The devices have a Read Cache feature that improves the read throughput for large files. During cache reading, the devices load the data in a cache register while the previous data is transferred to the I/O buffers to be read. In multiplane operations, data in the page can be read out at 25 ns cycle time per byte. The I/O pins serve as the ports for command and address input as well as data input/output. This interface allows a reduced pin count and easy migration towards different densities, without any rearrangement of the footprint. Commands, Data, and Addresses are asynchronously introduced using CE#, WE#, ALE, and CLE control pins. The on-chip Program/Erase Controller automates all read, program, and erase functions including pulse repetition, where required, and internal verification and margining of data. A WP# pin is available to provide hardware protection against program and erase operations. The output pin R/B# (open drain buffer) signals the status of the device during each operation. It identifies if the program/erase/read controller is currently active. The use of an open-drain output allows the Ready/Busy pins from several memories to connect to a single pull-up resistor. In a system with multiple memories the R/B# pins can be connected all together to provide a global status signal. The Reprogram function allows the optimization of defective block management — when a Page Program operation fails the data can be directly programmed in another page inside the same array section without the time consuming serial data insertion phase. Multiplane Copy Back is also supported. Data read out after Copy Back Read (both for single and multiplane cases) is allowed. In addition, Cache Program and Multiplane Cache Program operations improve the programing throughput by programing data using the cache register. The devices are available in the TSOP48 (12 x 20 mm) package and come with the following security features: OTP (one time programmable) area, which is a restricted access area where sensitive data/code can be stored permanently. Serial number (unique identifier), which allows the devices to be uniquely identified. Contact factory for support of this feature. These security features are subject to an NDA (non-disclosure agreement) and are, therefore, not described in the datasheet. For more details about them, contact your nearest sales office

Standard export packaging available. Customers can choose from cartons, wooden cases, and wooden pallets according to their requirements.