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تفاصيل المنتج:
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| تعبئة المنتج: | FBGA-96 (8 × 14) | طريقة التغليف: | شريط منسوج |
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| الوزن الإجمالي للسلعة: | 0.44 (ز) | إعدادات: | 32 ميج × 4 × 8 البنوك |
| تحديث العد: | 8K | ||
| إبراز: | 3.3V 1Gb SLC NAND Flash,FBGA-96 NAND Flash Memory,8X14 SLC NAND Flash,FBGA-96 NAND Flash Memory,8X14 SLC NAND Flash |
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Offered in 128Mx8bit, the lMS1G083ZZM1S-WP is a 1G-bit NAND Flash Memory with spare 32Mbi. The device is offered in 3.3v vcc. Its NAND cell provides the most cost-effective solution for the solid state application market. A program operation can be performed in typical 400us on the (2K+64Byte) page and an erase operation can be performed in typical 4.5ms on a (128K+4K)Byte block. Data in the data register can be read out at 25ns cycle time per Byte. The I/O pins serve as the ports for address and data input/output as well as command input. The on-chip write control automates all program and erase functions including pulse repetition, where required, and internal verification and maintaining of data. The IMS1G083ZZM1S-WP is an optimum solution for large nonvolatile storage applications such as solid state file storage and other portable applications requiring non-volatility.
| Pin Name | Function | Description |
|---|---|---|
| I/O0 ~ I/O7 | DATA INPUTS/OUTPUTS | The I/O pins are used to input command, address and data, and to output data during read operations. The I/O pins float to high-z when the chip is deselected or when the outputs are disabled. |
| CLE | COMMAND LATCH ENABLE | The CLE input controls the activating path for commands sent to the command register. When active high, commands are latched into the command register through the I/O ports on the rising edge of the WE signal. |
| ALE | ADDRESS LATCH ENABLE | The ALE input controls the activating path for address to the internal address registers. Addresses are latched on the rising edge of WE with ALE high. |
| CE | CHIP ENABLE | The CE input is the device selection control. When the device is in the Busy state, CE high is ignored, and the device does not return to standby mode in program or erase operation. |
| RE | READ ENABLE | The RE input is the serial data-out control, and when active drives the data onto the I/O bus. Data is valid tREA after the falling edge of RE which also increments the internal column address counter by one. |
| WE | WRITE ENABLE | The WE input controls writes to the I/O port. Commands, address and data are latched on the rising edge of the WE pulse. |
| WP | WRITE PROTECT | The WP pin provides inadvertent program/erase protection during power transitions. The internal high voltage generator is reset when the WP pin is active low. |
| R/B | READY/BUSY OUTPUT | The R/B output indicates the status of the device operation. When low, it indicates that a program, erase or random read operation is in process and returns to high state upon completion. It is an open drain output and does not float to high-z condition when the chip is deselected or when outputs are disabled. |
| VCC | POWER | VCC is the power supply for device. |
| VSS | GROUND | |
| N/C | NO CONNECTION |
Standard export packaging available. Customers can choose from cartons, wooden cases, and wooden pallets according to their requirements.
How to obtain the price?
We typically provide quotations within 24 hours of receiving your inquiry (excluding weekends and holidays). For urgent pricing requests, please contact us directly.
What is your delivery time?
Small batches typically ship within 7-15 days, while large batch orders may require approximately 30 days depending on order quantity and season.
What are your payment terms?
Factory pricing with 30% deposit and 70% balance payment via T/T before shipment.
What are the shipping options?
Available shipping methods include sea freight, air freight, and express delivery (EMS, UPS, DHL, TNT, FEDEX). Please confirm your preferred method before ordering.
اتصل شخص: Mr. Sun
الهاتف :: 18824255380
